External memory

The nRF5340 DK has a 64 Mb external flash memory. The memory is a multi-I/O memory that supports both Serial Peripheral Interface (SPI) and Quad Serial Peripheral Interface (QSPI).

Note: To run the QSPI at 96 MHz, use a 1.8 V board voltage. A higher board voltage might cause RF interference. Change the board voltage by supplying 1.8 V to the VIO_REF pin on P20. For more information, see nRF5340 Errata.

The memory is connected to the chip using the following General-Purpose Input/Output (GPIO)s.

Table 1. Flash memory GPIO usage and connecting solder bridges
GPIO	Flash memory pin	Solder bridge for memory use (default: shorted)	Solder bridge for GPIO use (default: open)
P0.18	CS	SB13	SB23
P0.17	SCLK	SB11	SB21
P0.13	SIO_0/SI	SB12	SB22
P0.14	SIO_1/SO	SB14	SB24
P0.15	SIO_2/WP	SB15	SB25
P0.16	SIO_3/HOLD	SB10	SB20

To use the GPIOs for a purpose other than the onboard external memory and have them available on the P24 connector, solder bridges SB10–SB15 must be cut and solder bridges SB20–SB25 must be shorted. See the following figure for details.

Figure 1. Configuring GPIOs for external memory

nRF5340 DK: Configuring GPIOs for external memory

Note: If debugging the QSPI communication is needed, SB20–SB25 can be shorted without cutting SB10–SB15, but the pins should not be driven externally.

By default, the power supply of the external memory is from the VDD domain, and it is controlled by the nRF ONLY switch SW6. In the nRF only mode, the optional VDD and VDD_nRF power sources can be used to keep the external memory powered. If VDD_nRF is selected, the power consumption of the external memory is added to the nRF5340 current measured on P22 or P23. VDD_PER is the output voltage from the U4 switch. It is used as the power source for the LEDs. See the following table for configuration.

Table 2. Flash memory power source configuration
Power source	Solder bridge	Default state
VDD_PER	SB16	Shorted
VDD	SB17	Open
VDD_nRF	SB18	Open