Registers

nRF9161 Product Specification
  • nRF9161 Product Specification
  • Revision history
  • About this document
  • Product overview
  • Block diagram
  • Peripheral interface
  • Application core
  • CPU
  • Memory
  • VMC — Volatile memory controller
  • NVMC — Non-volatile memory controller
  • FICR — Factory information configuration registers
  • UICR — User information configuration registers
  • EasyDMA
  • AHB multilayer interconnect
  • Power and clock management
  • Power management
  • System Disabled mode
  • System OFF mode
  • Emulated System OFF mode
  • System ON mode
  • Registers
  • Electrical specification
  • ENABLE pin
  • Power supply
  • Power supply monitoring
  • Clock management
  • Reset
  • Current consumption
  • Electrical specification
  • Current consumption during System Disabled
  • Sleep
  • Application CPU active current consumption
  • I2S
  • PDM
  • PWM
  • SAADC
  • TIMER
  • SPIM
  • SPIS
  • TWIM
  • TWIS
  • UARTE
  • WDT
  • Modem current consumption
  • DECT NR+ current consumption
  • GPS current consumption
  • Register description
  • POWER — Power control
  • CLOCK — Clock control
  • REGULATORS — Voltage regulators control
  • Peripherals
  • CRYPTOCELL — ARM TrustZone CryptoCell 310
  • DPPI - Distributed programmable peripheral interconnect
  • EGU — Event generator unit
  • GPIO — General purpose input/output
  • GPIOTE — GPIO tasks and events
  • IPC — Interprocessor communication
  • I2S — Inter-IC sound interface
  • KMU — Key management unit
  • PDM — Pulse density modulation interface
  • PWM — Pulse width modulation
  • RTC — Real-time counter
  • SAADC — Successive approximation analog-to-digital converter
  • SPIM — Serial peripheral interface master with EasyDMA
  • SPIS — Serial peripheral interface slave with EasyDMA
  • SPU — System protection unit
  • TIMER — Timer/counter
  • TWIM — I2C compatible two-wire interface master with EasyDMA
  • TWIS — I2C compatible two-wire interface slave with EasyDMA
  • UARTE — Universal asynchronous receiver/transmitter with EasyDMA
  • WDT — Watchdog timer
  • LTE modem
  • SIM card interface
  • LTE coexistence interface
  • LTE RF control external interface
  • RF front-end interface
  • Registers
  • Electrical specification
  • Key RF parameters for Cat-M1
  • Key RF parameters for Cat-NB1 and Cat-NB2
  • Receiver parameters for Cat-M1
  • Receiver parameters for Cat-NB1 and Cat-NB2
  • Transmitter parameters for Cat-M1
  • Transmitter parameters for Cat-NB1 and Cat-NB2
  • DECT NR+
  • GPS receiver
  • Debug and trace
  • Trace
  • ATB Funnel
  • ATB Replicator
  • ETB — Embedded trace buffer
  • ETM — Embedded trace macrocell
  • TPIU — Trace port interface unit
  • CTRL-AP - Control access port
  • TAD - Trace and debug control
  • Hardware and layout
  • Pin assignments
  • Mechanical specifications
  • Reference circuitry
  • Reflow conditions
  • Shelf and floor life
  • Operating conditions
  • Absolute maximum ratings
  • Ordering information
  • Regulatory information
  • Legal notices
Back to home page