Pin configuration

nRF54LM20A | nRF54LM20B Datasheet

The MCK, SCK, FSYNC, SDIN and SDOUT signals associated with TDM are mapped to physical pins according to the pin numbers specified in the PSEL.x registers.

These pins are acquired whenever TDM is enabled through the register ENABLE.

When a pin is acquired by TDM, the direction of the pin (input or output) will be configured automatically, and any pin direction setting done in the GPIO module will be overridden. The directions for the various TDM pins are shown in the following tables.

To secure correct signal levels on the pins in System OFF mode, and when TDM is disabled, these pins must be configured in the GPIO peripheral directly.

Table 2. GPIO configuration before enabling peripheral (Master mode)
TDM signal TDM pin Direction Output value Comment
MCK As specified in PSEL.MCK Output 0
FSYNC As specified in PSEL.FSYNC Output 0
SCK As specified in PSEL.SCK Output 0
SDIN As specified in PSEL.SDIN Input Not applicable
SDOUT As specified in PSEL.SDOUT Output 0
Table 3. GPIO configuration before enabling peripheral (Slave mode)
TDM signal TDM pin Direction Output value Comment
MCK As specified in PSEL.MCK Output 0
FSYNC As specified in PSEL.FSYNC Input Not applicable
SCK As specified in PSEL.SCK Input Not applicable
SDIN As specified in PSEL.SDIN Input Not applicable
SDOUT As specified in PSEL.SDOUT Output 0