SAADC — Successive approximation analog-to-digital converter

nRF54LV10A Preliminary Datasheet

The SAADC peripheral is a differential successive approximation register (SAR) analog-to-digital converter (ADC).

The main features of SAADC are the following:

  • Operation modes
    • 10-bit arithmetic resolution in single-ended mode, 11-bit arithmetic resolution in differential mode
    • Multiple 20 kHz inputs with maximum sample rate of 1 Msps (all inputs)
    • One fast input up to 500 kHz (Nyquist) frequency with maximum sample rate 1 Msps (only with AIN0 positive and AIN1 negative)
    • Improved accuracy with oversampling
    • Configurable 8/10/12/14 bit output resolution
  • Multiple analog inputs:
    • GPIO pins with analog function (input range 0 to VDDL)
    • VDDL (divided to a valid range)
  • Up to eight fixed gain input channels with 20 kHz bandwidth:
    • One input per single-ended channel, and two inputs per differential channel
    • Scan mode configurable with both single-ended and differential channels
    • Each channel can be configured to select any of the above analog inputs
  • Sampling triggered by a task from software or a DPPI channel for full flexibility on sample frequency source from low-power 32.768 kHz RTC or more accurate 1/16 MHz timers
  • One-shot conversion mode to sample a single channel
  • Scans by taking samples of all selected channels in consecutive order
  • Support for direct sample transfer to RAM using EasyDMA
  • Interrupts on single sample and full buffer events
  • Samples stored as 16-bit two's complement values for differential and single-ended sampling
  • Continuous sampling without the need of an external timer
  • On-the-fly limit checking