Clock pins

nRF54LV10A Preliminary Datasheet

The device has dedicated clock pins for some peripherals. These pins have been optimized to ensure correct timing relationships between clock and data signals for these peripherals.

Clock pins can also be used as regular I/O data pins.

The peripheral data signal must be configured to use pins close to the clock pin. This ensures that the internal paths from the peripheral to the pin have the same delay, so that the data and clock signals reach the pins at the same time.

For high-speed signals, the printed circuit board (PCB) layout must use short PCB traces of identical length. This makes sure any delays are kept to a minimum, with close to identical delay on the clock and data path.

The following table shows which peripheral signals must use clock pins.
Table 2. Peripheral signals and clock pin requirement
Peripheral Signal Clock pin required
SPIM/SPIS SDO No
SPIM/SPIS SDI No
SPIM/SPIS SCK Yes
SPIM/SPIS CSN No
SPIM/SPIS DCX No
TWIM/TWIS SCL Yes
TRACE TRACEDATA[] No
TRACE TRACECLK Yes, dedicated pin
GRTC CLKOUT32K Yes, dedicated pin
GRTC PWMOUT Yes, dedicated pin
GRTC CLKOUTFAST Yes, dedicated pin