Address offset: 0x12

BOOST Interrupt Enable Clear

Bit number 7 6 5 4 3 2 1 0
ID H G F E D C B A
Reset 0x00 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1C

VBATWRNF

Writing 1 disables interrupts from the VBATWRNF event
B

RW
W1C

VBATWRNR

Writing 1 disables interrupts from the VBATWRNR event
C

RW
W1C

VOUTMIN

Writing 1 disables interrupts from the VOUTMIN event
D

RW
W1C

VOUTWRNF

Writing 1 disables interrupts from the VOUTWRNF event
E

RW
W1C

VOUTWRNR

Writing 1 disables interrupts from the VOUTWRNR event
F

RW
W1C

VOUTDPSF

Writing 1 disables interrupts from the VOUTDPSF event
G

RW
W1C

VOUTDPSR

Writing 1 disables interrupts from the VOUTDPSR event
H

RW
W1C

VOUTOK

Writing 1 disables interrupts from the VOUTOK event