Address offset: 0x11

GPIO Interrupt Enable Clear

Bit number 7 6 5 4 3 2 1 0
ID F E D C B A
Reset 0x00 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1C

GPIO0FALL

Writing 1 disables interrupts from the GPIO0FALL event
B

RW
W1C

GPIO0RISE

Writing 1 disables interrupts from the GPIO0RISE event
C

RW
W1C

GPIO1FALL

Writing 1 disables interrupts from the GPIO1FALL event
D

RW
W1C

GPIO1RISE

Writing 1 disables interrupts from the GPIO1RISE event
E

RW
W1C

GPIO2FALL

Writing 1 disables interrupts from the GPIO2FALL event
F

RW
W1C

GPIO2RISE

Writing 1 disables interrupts from the GPIO2RISE event