Address offset: 0x8

BOOST Event Clear

Bit number 7 6 5 4 3 2 1 0
ID H G F E D C B A
Reset 0x00 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1C

VBATWRNF

VBAT dropped below VBATMINH threshold. Writing 1 clears the event (e.g. to acknowledge an interrupt).
B

RW
W1C

VBATWRNR

VBAT rose above VBATMINH threshold. Writing 1 clears the event (e.g. to acknowledge an interrupt).
C

RW
W1C

VOUTMIN

VOUT dropped below VOUTMIN threshold. Writing 1 clears the event (e.g. to acknowledge an interrupt).
D

RW
W1C

VOUTWRNF

VOUT dropped below VOUTWRN threshold. Writing 1 clears the event (e.g. to acknowledge an interrupt).
E

RW
W1C

VOUTWRNR

VOUT rose above VOUTWRN threshold. Writing 1 clears the event (e.g. to acknowledge an interrupt).
F

RW
W1C

VOUTDPSF

VOUT dropped below VOUTDPS threshold. Writing 1 clears the event (e.g. to acknowledge an interrupt).
G

RW
W1C

VOUTDPSR

VOUT rose above VOUTDPS threshold. Writing 1 clears the event (e.g. to acknowledge an interrupt).
H

RW
W1C

VOUTOK

VOUT reached target level after being low. Writing 1 clears the event (e.g. to acknowledge an interrupt).