Address offset: 0x7

GPIO Event Clear

Bit number 7 6 5 4 3 2 1 0
ID F E D C B A
Reset 0x00 0 0 0 0 0 0 0 0
ID R/W Field Value ID Value Description
A

RW
W1C

GPIO0FALL

Falling edge on GPIO0. Writing 1 clears the event (e.g. to acknowledge an interrupt).
B

RW
W1C

GPIO0RISE

Rising edge on GPIO0. Writing 1 clears the event (e.g. to acknowledge an interrupt).
C

RW
W1C

GPIO1FALL

Falling edge on GPIO1. Writing 1 clears the event (e.g. to acknowledge an interrupt).
D

RW
W1C

GPIO1RISE

Rising edge on GPIO1. Writing 1 clears the event (e.g. to acknowledge an interrupt).
E

RW
W1C

GPIO2FALL

Reserved (falling edge on GPIO2). Writing 1 clears the event (e.g. to acknowledge an interrupt).
F

RW
W1C

GPIO2RISE

Reserved (rising edge on GPIO2). Writing 1 clears the event (e.g. to acknowledge an interrupt).