| ID | Base address | Instance | TrustZone | Split access | Description | ||
|---|---|---|---|---|---|---|---|
| Map | Att | DMA | |||||
| 28 | 0x5001C000 | SWI00 |
HF |
S |
NA | No |
Software interrupt SWI00 |
| 29 | 0x5001D000 | SWI01 |
HF |
S |
NA | No |
Software interrupt SWI01 |
| 30 | 0x5001E000 | SWI02 |
HF |
S |
NA | No |
Software interrupt SWI02 |
| 31 | 0x5001F000 | SWI03 |
HF |
S |
NA | No |
Software interrupt SWI03 |
| N/A | 0x02F00000 | ICACHEDATA |
HF |
S |
NA | No |
Instruction cache data |
| N/A | 0x02F10000 | ICACHEINFO |
HF |
S |
NA | No |
Instruction cache info |
| N/A | 0xE0040000 | TPIU |
HF |
NS |
NA | No |
Trace port interface unit (Trace and Debug) |
| N/A | 0xE0041000 | ETM |
HF |
NS |
NA | No |
Embedded trace macrocell |
| N/A | 0xE0080000 | CPUC |
HF |
S |
NA | No |
Cortex-M33 configuration |
| N/A | 0xE0082000 | ICACHE |
HF |
S |
NA | No |
Instruction cache |