The GRTC peripheral has a built-in PWM that can drive one output pin as an 8-bit non-inverted pulse-width modulated output.
The PWM is based on the internal low frequency timer of the GRTC and the PWM has a period of 256 LFCLK clock cycles, resulting frequency is 128Hz.
The PWM can be started by the TASKS_PWMSTART task and can be stopped by the TASKS_PWMSTOP task. The PWM starts/stops on next time when the lower 8 bits of internal low frequency timer becomes to zero. It takes up to 256 LFCLK clock cycles to take these tasks to go into effect.
The STATUS.PWM.READY indicates busy while handling the tasks TASKS_PWMSTART and TASKS_PWMSTOP. These PWM tasks must be triggered only when the STATUS.PWM.READY status indicates ready. The EVENTS_PWMREADY event is generated when the STATUS.PWM.READY status changes from busy to ready.
The PWM compare value is configured using PWMCONFIG and the copied to the internal PWM compare register when the lower 8 bits of internal low frequency timer is 0.
The PWM output goes high when the the lower 8 bits of internal low frequency timer goes to zero and the PWM output goes low when the lower 8 bits of internal low frequency timer matches the PWM compare value. The EVENTS_PWMPERIODEND event is generated on the rising edge of the PWM output.
To optimize the GRTC power consumption, the EVENTS_PWMPERIODEND can be disabled using EVTEN/EVTENSET/EVTENCLR registers to prevent clock from being requested when those events are triggered.
The PWM is operating even while the device is in system OFF.
For the PWM output pin mapping, see Pin assignments. GRTC uses standard output drive strength for PWM output.