The QFN48 pin assignment figure and table describe the pinouts for this variant of the device.
Pins that can be used as clock signals are shown in as red in the figure. For more information about clock pins, see Clock pins.
| Pin | Clock pin | Name | Function | Description | Dedicated function |
|---|---|---|---|---|---|
| 1 | Yes |
P1.12 TRACEDATA[1] AIN7 |
Digital I/O Digital I/O Analog input |
General purpose IO Trace data Analog input |
Trace
|
| 2 |
|
P1.13 TRACEDATA[2] XL1 |
Digital I/O Digital I/O Analog input |
General purpose IO Trace data Connection for 32.768 kHz crystal |
Trace
|
| 3 |
|
P1.14 TRACEDATA[3] XL2 |
Digital I/O Digital I/O Analog input |
General purpose IO Trace data Connection for 32.768 kHz crystal |
Trace
|
| 4 |
|
P1.15 FLPR.4 QSPI.D3 |
Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO QSPI SCK |
FLPR FLPR(QSPI) |
| 5 | Yes |
P1.16 FLPR.0 QSPI.SCK |
Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO QSPI D0 |
FLPR FLPR(QSPI) |
| 6 | Yes |
P1.17 FLPR.1 QSPI.D1 |
Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO QSPI D1 |
FLPR FLPR(QSPI) |
| 7 |
|
P1.18 FLPR.3 QSPI.D2 RADIO[0] |
Digital I/O Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO QSPI D2 RADIO DFEGPIO |
FLPR FLPR(QSPI) RADIO |
| 8 | Yes |
P1.19 FLPR.2 QSPI.D1 RADIO[1] |
Digital I/O Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO QSPI D3 RADIO DFEGPIO |
FLPR FLPR(QSPI) RADIO |
| 9 | Yes |
P1.20 FLPR.5 QSPI.CSN RADIO[2] |
Digital I/O Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO QSPI CSN RADIO DFEGPIO |
FLPR FLPR(QSPI) RADIO |
| 10 |
|
P1.21 FLPR.6 RADIO[3] |
Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO RADIO DFEGPIO |
FLPR RADIO |
| 11 |
|
P1.22 FLPR.7 RADIO[4] |
Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO RADIO DFEGPIO |
FLPR RADIO |
| 12 |
|
P1.23 FLPR.8 RADIO[5] |
Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO RADIO DFEGPIO |
FLPR RADIO |
| 13 |
|
P1.24 FLPR.9 RADIO[6] |
Digital I/O Digital I/O Digital I/O |
General purpose IO General purpose IO RADIO DFEGPIO |
FLPR RADIO |
| 14 |
|
DECA |
Power |
Power supply decoupling |
|
| 15 |
|
VSS |
Power |
Ground |
|
| 16 |
|
DECD |
Power |
Power supply decoupling |
|
| 17 |
|
DCC |
Power |
DC/DC converter output |
|
| 18 |
|
VDDL |
Power |
Power supply |
|
| 19 |
|
CFLYL |
Power |
Fly capacitor for boost |
|
| 20 |
|
VDDL |
Power |
Power supply |
|
| 21 |
|
CFLYH |
Power |
Fly capacitor for boost |
|
| 22 |
|
DECB |
Power |
Power supply decoupling |
|
| 23 |
|
P1.25 |
Digital I/O |
General purpose IO |
|
| 24 |
|
P0.00 |
Digital I/O |
General purpose IO |
|
| 25 |
|
P0.01 |
Digital I/O |
General purpose IO |
|
| 26 |
|
P0.02 |
Digital I/O |
General purpose IO |
|
| 27 | Yes |
P0.03 |
Digital I/O Digital I/O |
General purpose I/O GRTC PWM |
GRTC |
| 28 | Yes |
P0.04 |
Digital I/O Digital I/O |
General purpose I/O GRTC CLKOUT32K |
GRTC |
| 29 |
|
SWDIO |
Debug |
Serial wire data. Bidirectional with standard-drive and on-chip pull-up. |
|
| 30 |
|
SWDCLK |
Debug |
Serial wire clock. Input with on-chip pull-down. |
|
| 31 |
|
nRESET |
Reset |
Pin reset with on-chip pull-up |
|
| 32 |
|
ANT |
RF |
Single ended radio antenna connection |
|
| 33 |
|
VSS |
Power |
Ground |
|
| 34 |
|
DECRF |
Power |
Power supply decoupling |
|
| 35 |
|
XC1 |
Analog input |
Connection for 32 MHz crystal |
|
| 36 |
|
XC2 |
Analog input |
Connection for 32 MHz crystal |
|
| 37 | Yes |
P1.08 |
Digital I/O Digital I/O |
General purpose I/O GRTC CLKOUTFAST |
GRTC |
| 38 |
|
P1.09 |
Digital I/O |
General purpose I/O |
|
| 39 |
|
P1.00 AIN0 |
Digital I/O Analog input |
General purpose I/O Analog input |
|
| 40 |
|
P1.01 AIN1 |
Digital I/O Analog input |
General purpose I/O Analog input |
|
| 41 |
|
P1.02 AIN2 |
Digital I/O Analog input |
General purpose I/O Analog input |
|
| 42 | Yes |
P1.03 AIN3 |
Digital I/O Analog input |
General purpose I/O Analog input |
|
| 43 |
|
P1.06 |
Digital I/O |
General purpose I/O |
|
| 44 | Yes |
P1.04 |
Digital I/O |
General purpose I/O |
|
| 45 |
|
P1.05 ASO[0] EXTREF |
Digital I/O Digital I/O Analog input |
General purpose IO TAMPC active shield output External reference |
TAMPC |
| 46 |
|
P1.07 AIN4 ASI[0] |
Digital I/O Analog input Digital I/O |
General purpose IO Analog input TAMPC active shield input |
TAMPC |
| 47 |
|
P1.10 ASO[1] TRACECLK AIN5 |
Digital I/O Digital I/O Digital I/O Analog input |
General purpose IO TAMPC active shield output Trace clock Analog input |
TAMPC Trace
|
| 48 | Yes |
P1.11 ASI[1] TRACEDATA[0] SWO AIN6 |
Digital I/O Digital I/O Digital I/O Digital I/O Analog input |
General purpose IO TAMPC active shield input Trace data Serial wire output (SWO) Analog input |
TAMPC Trace
|
| 49 |
|
VSS |
Power |
Ground |
|
Exposed die pad (pin 49) must be connected to ground (VSS, pins 15 and 33) for proper device operation.