CSP47 (CAAA) package pin assignments

nRF54L15 | nRF54L10 | nRF54L05 Datasheet

The CSP47 pin assignment figure and table describe the pinouts for this variant of the device.

Pins that can be used as clock signals are shown in as red in the figure. For more information about clock pins, see Clock pins.

Figure 4. CSP47 pin assignments, top view
CSP47 pin assignments, top view
Table 6. CSP47 pin assignments
Pin Clock pin Name Function Description Dedicated function
A1

 

XC1

Analog input

Connection for 32 MHz crystal

 

A2

 

XC2

Analog input

Connection for 32 MHz crystal

 

A3

Yes

P1.12

ASI[3]

RADIO[3]

AIN5

Digital I/O

Digital I/O

Digital I/O

Analog input

General purpose I/O

TAMPC active shield 3 input

RADIO DFEGPIO

Analog input

 

TAMPC

RADIO

 

 

A4

 

DECA

Power

0.9 V regulator supply decoupling

Must be connected to DECRF

A5

 

DECD

Power

0.9 V regulator supply decoupling

 

A6

 

VSS

Power

Ground

 

A7

 

DCC

Power

DC/DC regulator output

 

B1

 

DECRF

Power

0.9 V regulator supply decoupling

Must be connected to DECA. See Reference circuitry.

B3

 

P1.09

ASO[2]

RADIO[0]

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

TAMPC active shield 2 output

RADIO DFEGPIO

 

TAMPC

RADIO

 

B4

 

P1.13

RADIO[4]

AIN6

Digital I/O

Digital I/O

Analog input

General purpose I/O

RADIO DFEGPIO

Analog input

 

RADIO

 

B5

 

P1.14

RADIO[5]

AIN7

Digital I/O

Digital I/O

Analog input

General purpose I/O

RADIO DFEGPIO

Analog input

 

RADIO

 

B6

 

P1.15

Digital I/O

General purpose I/O

 

B7

 

VDD

Power

Power supply

 

C2

 

VSS_PA

Power

Ground (radio supply)

 

C3

 

P1.10

ASI[2]

RADIO[1]

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

TAMPC active shield 2 input

RADIO DFEGPIO

 

TAMPC

RADIO

 

C4

Yes

P1.11

ASO[3]

RADIO[2]

AIN4

Digital I/O

Digital I/O

Digital I/O

Analog input

General purpose I/O

TAMPC active shield 3 output

RADIO DFEGPIO

Analog input

 

TAMPC

RADIO

 

 

C5

 

P1.00

XL1

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

 

C6

 

P1.01

XL2

Digital I/O

Analog input

General purpose I/O

Connection for 32.768 kHz crystal

 

C7

 

P1.02

NFC1

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

 

D1

 

ANT

RF

Single ended radio antenna connection

See Reference circuitry for guidelines on how to ensure good RF performance

D2

 

nRESET

Reset

Pin reset with on-chip pull-up

 

D3

Yes

P0.04

 

 

Digital I/O

Digital I/O

General purpose I/O

GRTC CLKOUT32K

 

GRTC

D4

 

P2.08

 

TRACEDATA[1]

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

FLPR.8

Trace data

SPIM SDO

SPIS SDO

UARTE TXD

 

FLPR

Trace

SPIM00/21

SPIS00/21

UARTE00/21

D5

Yes

P1.03

NFC2

Digital I/O

NFC input

General purpose I/O

NFC antenna connection

 

D6

Yes

P1.04

ASO[0]

AIN0

Digital I/O

Digital I/O

Analog input

General purpose I/O

TAMPC active shield 0 output

Analog input

 

TAMPC

 

 

D7

 

P1.06

ASO[1]

AIN2

Digital I/O

Digital I/O

Analog input

General purpose I/O

TAMPC active shield 1 output

Analog input

 

TAMPC

 

 

E1

Yes

P0.03

 

 

Digital I/O

Digital I/O

General purpose I/O

GRTC PWM

 

GRTC

 

E2

 

P0.02

Digital I/O

General purpose I/O

 

E3

 

SWDCLK

Debug

Serial wire clock. Input with on-chip pull-down.

 

E4

 

P2.07

 

TRACEDATA[0]

SWO

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

FLPR.7

Trace data

Serial wire output (SWO)

SPIM DCX

UARTE RXD

 

FLPR

Trace

Trace

SPIM00/21

UARTE00/21

E5

 

P2.03

 

 

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

FLPR.3

QSPI D2

 

FLPR

FLPR (QSPI)

E6

 

P1.05

ASI[0]

RADIO[6]

AIN1

Digital I/O

Digital I/O

Digital I/O

Analog input

General purpose I/O

TAMPC active shield 0 input

RADIO DFEGPIO

Analog input

 

TAMPC

RADIO

 

E7

 

P1.07

ASI[1]

AIN3

Digital I/O

Digital I/O

Analog input

General purpose I/O

TAMPC active shield 1 input

Analog input

 

TAMPC

 

 

F1

 

P0.01

Digital I/O

General purpose I/O

 

F2

 

SWDIO

Debug

Serial wire data. Bidirectional with standard-drive and on-chip pull-up.

 

F3

 

P2.09

 

TRACEDATA[2]

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

FLPR.9

Trace data

SPIM SDI

SPIS SDI

UARTE CTS

 

FLPR

Trace

SPIM00/21

SPIS00/21

UARTE00/21

F4

Yes

P2.06

 

 

 

TRACECLK

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

FLPR.6

SPIM SCK

SPIS SCK

Trace clock

 

FLPR

SPIM00/21

SPIS00/21

Trace

F5

 

P2.04

 

 

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

SPIM SDI

SPIS SDI

UARTE CTS

FLPR.2

QSPI D1

 

SPIM00/20

SPIS00/20

UARTE00/20

FLPR

FLPR (QSPI)

 

F6

 

P2.02

 

 

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

SPIM SDO

SPIS SDO

UARTE TXD

FLPR.1

QSPI D0

 

SPIM00/20

SPIS00/20

UARTE00/20

FLPR

FLPR (QSPI)

 

 

F7

Yes

P1.08

 

EXTREF

Digital I/O

Digital I/O

Analog input

General purpose I/O

GRTC CLKOUTFAST

External reference for SAADC

 

G1

 

P0.00

Digital I/O

General purpose I/O

 

G2

 

P2.10

 

TRACEDATA[3]

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

FLPR.10

Trace data

SPIM CSN

SPIS CSN

UARTE RTS

 

FLPR

Trace

SPIM00/21

SPIS00/21

UARTE00/21

G3

 

VDD

Power

Power supply

 

G4

 

VSS

Power

Ground

 

G5

 

P2.05

 

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

SPIM CSN

SPIS CSN

UARTE RTS

FLPR.5

QSPI CSN

 

SPIM00/20

SPIS00/20

UARTE00/20

FLPR

FLPR (QSPI)

G6

 

P2.00

 

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

SPIM DCX

UARTE RXD

FLPR.4

QSPI D3

 

SPIM00/20

UARTE00/20

FLPR

FLPR (QSPI)

G7

Yes

P2.01

 

 

 

 

Digital I/O

Digital I/O

Digital I/O

Digital I/O

Digital I/O

General purpose I/O

SPIM SCK

SPIS SCK

FLPR.0

QSPI SCK

 

SPIM00/20

SPIS00/20

FLPR

FLPR (QSPI

For the device to function properly, the exposed die pad (pin 49) must be connected to ground (VSS, pins 32 and 44).