The device power domains have their own GPIO ports with different capabilities.
The following is a list of all GPIO ports (P[n]) in the system.
- P0 low-power domain – These I/O pins can wake the system up from System OFF or System ON sleep, and can be accessed by all peripherals in the low-power domain.
- P1 peripheral domain – These I/O pins can wake the system up from System OFF or System ON sleep, and can be accessed by all peripherals in the peripheral domain.
- P2 MCU domain – These I/O pins are faster and can be used for high-speed signals such as trace or fast serial peripheral communication. GPIO P2 cannot wake the system from sleep. P2 does not have the GPIO SENSE or DETECT mechanism, or GPIOTE.
Peripherals must use pins in their own domain. However, some P2 pins can be used for select serial interfaces in the peripheral domain when the device is in Constant Latency sub-power mode. This is not the most power-efficient way of connecting these serial interfaces, but adds flexibility when designing a circuit board. These pins must be configured and used only for the function listed in the pin assignments table, see Pin assignments. When setting up the peripheral's PSEL registers, it must be connected to the corresponding function listed in the pin assignments table, e.g. a UARTE TXD pin must be configured in a PSEL.TXD register. For more information about Constant Latency sub-power mode, see Sub-power modes.
Peripherals cannot mix pins from different ports. All pins must be on the same port.
The following table lists the port special functions and characteristics.
| Port | Wakeup source | Extra high drive strength (E0E1) | Pin sense/detect | GPIOTE | Maximum speed [MHz] |
|---|---|---|---|---|---|
| P0 | Yes | No | Yes | Yes | 8 |
| P1 | Yes | No | Yes | Yes | 8 |
| P2 | No | Yes | No | No | 64 |
In addition to the capabilities of the port, some specific pins have additional functions. These are listed in Pin assignments.