Pin configuration

The MCK, SCK, LRCK, SDIN and SDOUT signals associated with the I²S module are mapped to physical pins according to the pin numbers specified in the PSEL.x registers.

These pins are acquired whenever the I²S module is enabled through the register ENABLE.

When a pin is acquired by the I²S module, the direction of the pin (input or output) will be configured automatically, and any pin direction setting done in the GPIO module will be overridden. The directions for the various I²S pins are shown below in GPIO configuration before enabling peripheral (Master mode) and GPIO configuration before enabling peripheral (Slave mode).

To secure correct signal levels on the pins in System OFF mode, and when the I²S module is disabled, these pins must be configured in the GPIO peripheral directly.

Table 2. GPIO configuration before enabling peripheral (Master mode)
I²S signal	I²S pin	Direction	Output value
MCK	As specified in PSEL.MCK	Output	0
LRCK	As specified in PSEL.LRCK	Output	0
SCK	As specified in PSEL.SCK	Output	0
SDIN	As specified in PSEL.SDIN	Input	Not applicable
SDOUT	As specified in PSEL.SDOUT	Output	0

Table 3. GPIO configuration before enabling peripheral (Slave mode)
I²S signal	I²S pin	Direction	Output value
MCK	As specified in PSEL.MCK	Output	0
LRCK	As specified in PSEL.LRCK	Input	Not applicable
SCK	As specified in PSEL.SCK	Input	Not applicable
SDIN	As specified in PSEL.SDIN	Input	Not applicable
SDOUT	As specified in PSEL.SDOUT	Output	0