Instances
| Instance | Domain | Base address | Description |
|---|---|---|---|
| DPPIC00 | GLOBAL | 0x40042000 |
DPPI controller DPPIC00 |
| DPPIC10 | GLOBAL | 0x40082000 |
DPPI controller DPPIC10 |
| DPPIC20 | GLOBAL | 0x400C2000 |
DPPI controller DPPIC20 |
| DPPIC30 | GLOBAL | 0x40102000 |
DPPI controller DPPIC30 |
Configuration
| Instance | Domain | Configuration |
|---|---|---|
| DPPIC00 | GLOBAL |
16 DPPI channels 2 DPPI groups |
| DPPIC10 | GLOBAL |
24 DPPI channels 6 DPPI groups |
| DPPIC20 | GLOBAL |
16 DPPI channels 6 DPPI groups |
| DPPIC30 | GLOBAL |
4 DPPI channels 2 DPPI groups |
Register overview
| Register | Offset | Description |
|---|---|---|
| TASKS_CHG[n].EN | 0x000 |
Enable channel group n |
| TASKS_CHG[n].DIS | 0x004 |
Disable channel group n |
| SUBSCRIBE_CHG[n].EN | 0x080 |
Subscribe configuration for task CHG[n].EN |
| SUBSCRIBE_CHG[n].DIS | 0x084 |
Subscribe configuration for task CHG[n].DIS |
| CHEN | 0x500 |
Channel enable register |
| CHENSET | 0x504 |
Channel enable set register |
| CHENCLR | 0x508 |
Channel enable clear register |
| CHG[n] | 0x800 |
Channel group n Note: Writes to this register are ignored if either SUBSCRIBE_CHG[n].EN or SUBSCRIBE_CHG[n].DIS is enabled |