Port capabilities

nRF54LS05B Datasheet

The device power domains have their own GPIO ports with different capabilities.

The following is a list of all GPIO ports (P[n]) in the system.

  • P0 low-power domain – These I/O pins can wake the system up from System OFF or System ON sleep, and can be accessed by all peripherals in the low-power domain.
  • P1 peripheral domain – These I/O pins can wake the system up from System OFF or System ON sleep, and can be accessed by all peripherals in the peripheral domain.

Peripherals cannot mix pins from different ports. All pins must be on the same port.

The following table lists the port special functions and characteristics.

Table 1. Port capabilities
Port Wakeup source Extra high drive strength (E0E1) Pin sense/detect GPIOTE Maximum speed [MHz]
P0 Yes No Yes Yes 8
P1 Yes No Yes Yes 8

Please note that certain peripherals can operate the GPIOs at higher frequencies than those specified in the table above. In addition to the capabilities of the port, some specific pins have additional functions. These are listed in Pin assignments.