TAMPC — Tamper controller

nRF54LS05B Datasheet

The tamper controller peripheral handles input from internal and external physical attack detectors and controls the device response.

The following figure shows an overview of the TAMPC detectors, input, and output.

Figure 1. TAMPC overview
Page-1 Rectangle.23 TAMPC TAMPC Rectangle.6 Device internal detectors Device internal detectors Dynamic connector.20 Rectangle.25 Events and IRQ Events and IRQ Sheet.26 Dynamic connector.38 Sheet.46 Internal tampers Internal tampers Sheet.55 IRQ IRQ Sheet.58 Sheet.59 Sheet.61 TAMPER event TAMPERevent Rectangle.2 Signal protector Signal protector Rectangle.28 Protected signals Protected signals
TAMPC implements the following physical security features:
  • Detection of fault injection attacks (voltage glitching, electromagnetic fault injection, etc.)
    • Signal protector to guard critical configuration signals
    • Glitch detectors to detect timing violations of internal logic
The tamper detectors are divided into two categories: external and internal. The external detectors rely on external stimuli through dedicated GPIO pins, and the internal detectors rely on internal signals not exposed outside the device package.

Internal tamper detectors

A tamper attack detected by any of the internal tamper detectors indicates that the device's internal logic could be affected by the attack, and the system state could be compromised.