nRF54LS05A and nRF54LS05B are pin compatible ultra-low power System on Chip (SoC), with different memory configurations.
The multiprotocol 2.4 GHz transceiver supports Bluetooth® Low Energy and allows for the implementation of proprietary 2.4 GHz protocols.
The main processing unit is an Arm® Cortex®-M33 processor running at up to 128 MHz, supported by non-volatile RRAM and RAM memory.
The Arm Cortex-M33 has a memory protection unit (MPU) for application security.
The peripheral set offers a variety of analog and digital functionality enabling single-chip implementation of a wide range of applications.
The device non-volatile memory has a boot region that can be made immutable before the CPU starts up. Boot initiated from an immutable source allows subsequent boot steps to be performed by authenticated code.
The debug access port can be enabled or disabled to allow debugging. The non-volatile memory can be protected against erasing, providing protection from unauthenticated repurposing. Authenticated debug access control, such as facilitating the Arm ADAC architecture, is supported through a hardware mailbox. The mailbox allows on-chip firmware to authenticate the debug host before enabling the device debug interface.