Registers

Enable RADIO in TX mode

Enable RADIO in RX mode

Start RADIO

Stop RADIO

Disable RADIO

Start the RSSI and take one single sample of the receive signal strength

Start the bit counter

Stop the bit counter

Enable RADIO in PLL mode (standby for either TX or RX)

Reset all public registers, but with these exceptions: DMA registers and EVENT/INTEN/SUBSCRIBE/PUBLISH registers. Only to be used in DISABLED state.

Subscribe configuration for task TXEN

Subscribe configuration for task RXEN

Subscribe configuration for task START

Subscribe configuration for task STOP

Subscribe configuration for task DISABLE

Subscribe configuration for task RSSISTART

Subscribe configuration for task BCSTART

Subscribe configuration for task BCSTOP

Subscribe configuration for task PLLEN

Subscribe configuration for task SOFTRESET

RADIO has ramped up and is ready to be started

RADIO has ramped up and is ready to be started TX path

RADIO has ramped up and is ready to be started RX path

Address sent or received

Packet payload sent or received

Memory access for packet data has been completed

The last bit is sent on air or last bit is received

RADIO has been disabled

A device address match occurred on the last received packet

No device address match occurred on the last received packet

Packet received with CRC ok

Packet received with CRC error

Bit counter reached bit count value

Initial sync detected

PLL has settled and RADIO is ready to be enabled in either TX or RX mode

Address received

Publish configuration for event READY

Publish configuration for event TXREADY

Publish configuration for event RXREADY

Publish configuration for event ADDRESS

Publish configuration for event PAYLOAD

Publish configuration for event END

Publish configuration for event PHYEND

Publish configuration for event DISABLED

Publish configuration for event DEVMATCH

Publish configuration for event DEVMISS

Publish configuration for event CRCOK

Publish configuration for event CRCERROR

Publish configuration for event BCMATCH

Publish configuration for event SYNC

Publish configuration for event PLLREADY

Publish configuration for event RXADDRESS

Shortcuts between local events and tasks

Enable interrupt

Enable interrupt

Disable interrupt

Disable interrupt

Enable interrupt

Enable interrupt

Disable interrupt

Disable interrupt

Data rate and modulation

Configurable delay of PHYEND event for TX

Current radio state

Data whitening configuration

Timing

Frequency

Output power

Interframe spacing in µs

RSSI sample

Override configuration of receiver gain control loop

Fine tuning of the RF frequency

Config register

Carrier freq. offset estimate

Correlator thresholds

CRC status

Received address

CRC field of previously received packet

Device address match index

Payload status

Packet configuration register 0

Packet configuration register 1

Base address 0

Base address 1

Prefixes bytes for logical addresses 0-3

Prefixes bytes for logical addresses 4-7

Transmit address select

Receive address select

CRC configuration

CRC polynomial

CRC initial value

Device address base segment n

Device address prefix n

Device address match configuration

Bit counter compare

Search pattern configuration

Pattern mask

Packet pointer