The SCL and SDA signals are mapped to physical pins using the PSEL.SCL and PSEL.SDA registers.
The PSEL.SCL and PSEL.SDA registers and their configurations are only used when TWIS is enabled, and retained while the device is in System ON mode. When the peripheral is disabled, the pins function as regular GPIOs, and use the configuration in their respective OUT bit field and PIN_CNF[n] register. Only configure PSEL.SCL and PSEL.SDA when TWIS is disabled.
When in System OFF mode or when TWIS is disabled, the TWIS pins must be configured in the GPIO peripheral as described in the following table to secure correct signal levels.
Only one peripheral can be assigned to drive a GPIO pin at a time. Failing to do so may result in unpredictable behavior.
| TWIS signal | TWIS pin | Direction | Output value | Drive strength |
|---|---|---|---|---|
| SCL | As specified in PSEL.SCL | Input | Not applicable | S0D1 |
| SDA | As specified in PSEL.SDA | Input | Not applicable | S0D1 |